Coverage Based Pairwise Test Set Generation for Ve

专利名称：Coverage Based Pairwise Test Set

Generation for Verification of ElectronicDesigns

发明人：SUDHIR D. KADKADE,ALEXANDER

MATTHEW LYONS

申请号：US13363355申请日：20120131

公开号：US20130007680A1公开日：20130103

专利附图：

摘要：With various implementations of the invention, test sequences are generated

using a pairwise methodology. The generated test sequences are checked using aconstraint solver to determine if the test sequences satisfy a set of constraints. In someimplementations, the uncovered pairs for a particular input are checked using theconstraint solver to determine if any pairs violate the constraints. Any pairs found toviolate the constraints can be excluded from the test set. With some implementations,the uncovered pairs are sorted such that the sum of every three consecutive elements isodd.

申请人：SUDHIR D. KADKADE,ALEXANDER MATTHEW LYONS

地址：LAKE OSWEGO OR US,LAKE OSWEGO OR US

国籍：US,US

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